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lc 2 mos precision quad spst switches adg411/adg412/adg413 rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010 analog devices, inc. all rights reserved. features 44 v supply maximum ratings 15 v analog signal range low on resistance (< 35 ) ultralow power dissipation (35 w) fast switching times t on < 175 ns t off < 145 ns ttl-/cmos-compatible plug-in replacement for dg411/dg412/dg413 applications audio and video switching automatic test equipment precision data acquisition battery-powered systems sample-and-hold systems communication systems general description the adg411, adg412, and adg413 are monolithic cmos devices comprising four independently selectable switches. they are designed on an enhanced lc 2 mos process which provides low power dissipation yet gives high switching speed and low on resistance. the on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. fast switching speed coupled with high signal bandwidth also make the parts suitable for video signal switching. cmos construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments. the adg411, adg412, and adg413 contain four independent spst switches. the adg411 and adg412 differ only in that the digital control logic is inverted. the adg411 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the adg412. the adg413 has two switches with digital control logic similar to that of the adg411 while the logic is inverted on the other two switches. each switch conducts equally well in both directions when on, and each has an input signal range that extends to the supplies. in the off condition, signal levels up to the supplies are blocked. all switches exhibit break-before-make switching action for use in multiplexer applications. inherent in the design is low charge injection for minimum transients when switching the digital inputs. product highlights 1. extended signal range the adg411, adg412, and adg413 are fabricated on an enhanced lc 2 mos, giving an increased signal range which extends fully to the supply rails. 2. ultralow power dissipation 3. low r on 4. break-before-make switching this prevents channel shorting when the switches are configured as a multiplexer. 5. single-supply operation for applications where the analog signal is unipolar, the adg411, adg412, and adg413 can be operated from a single-rail power supply. the parts are fully specified with a single 12 v power supply and remain functional with single supplies as low as 5 v. functional block diagrams in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg411 switches shown for a logic 1 input 00024-001 figure 1. adg411 in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg412 switches shown for a logic 1 input 00024-002 figure 2. adg412 in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg413 switches shown for a logic 1 input 00024-003 figure 3. adg413
adg411/adg412/adg413 rev. d | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 product highlights ........................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 dual supply ................................................................................... 3 single supply ................................................................................. 4 absolute maximum ratings ............................................................5 esd caution...................................................................................5 pin configuration and function descriptions ..............................6 typical performance characteristics ..............................................7 terminology .......................................................................................9 applications ..................................................................................... 10 test circuits ..................................................................................... 11 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 15 revision history 6/10rev. c to rev. d updated outline dimensions ....................................................... 13 changes to ordering guide .......................................................... 15 11/04rev. b to rev. c format updated .................................................................. universal change to package drawing (figure 23) ..................................... 13 changes to ordering guide .......................................................... 14 7/04rev. a to rev. b changes to ordering guide ..................................................... 5 updated outline dimensions ............................................... 11
adg411/adg412/adg413 rev. d | page 3 of 16 specifications dual supply v dd = 15 v 10%, v ss = C15 v 10%, v l = 5 v 10%, gnd = 0 v, unless otherwise noted. 1 table 1. b version t version parameter +25c ?40c to +85c +25c ?55c to +125c unit test conditions/comments analog switch analog signal range v dd to v ss v dd to v ss v r on 25 25 typ v d = 8.5 v, i s = ?10 ma; 35 45 35 45 max v dd = +13.5 v, v ss = ?13.5 v leakage currents v dd = +16.5 v, v ss = ?16.5 v source off leakage i s (off) 0.1 0.1 na typ v d = +15.5 v/?15.5 v, v s = ?15.5 v/+15.5 v; 0.25 0.25 0.25 20 na max figure 15 drain off leakage i d (off) 0.1 0.1 na typ v d = +15.5 v/?15.5 v, v s = ?15.5 v/+15.5 v; 0.25 5 0.25 20 na max figure 15 channel on leakage i d , i s (on) 0.1 0.1 na typ v d = v s = +15.5 v/?15.5 v; 0.4 10 0.4 40 na max figure 16 digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.5 0.5 a max dynamic characteristics 2 t on 110 110 ns typ r l = 300 , c l = 35 pf; 175 175 ns max v s = 10 v; figure 17 t off 100 100 ns typ r l = 300 , c l = 35 pf; 145 145 ns max v s = 10 v; figure 17 break-before-make time delay, t d (adg413 only) 25 25 ns typ r l = 300 , c l = 35 pf; v s1 = v s2 = 10 v; figure 18 charge injection 5 5 pc typ v s = 0 v, r s = 0 , c l = 10 nf; figure 19 off isolation 68 68 db typ r l = 50 , c l = 5 pf, f = 1 mhz; figure 20 channel-to-channel crosstalk 85 85 db typ r l = 50 , c l = 5 pf, f = 1 mhz; figure 21 c s (off) 9 9 pf typ f = 1 mhz c d (off) 9 9 pf typ f = 1 mhz c d , c s (on) 35 35 pf typ f = 1 mhz power requirements v dd = +16.5 v, v ss = ?16.5 v; digital inputs = 0 v or 5 v i dd 0.0001 0.0001 a typ 1 5 1 5 a max i ss 0.0001 0.0001 a typ 1 5 1 5 a max i l 0.0001 0.0001 a typ 1 5 1 5 a max 1 temperature ranges are as foll ows: b versions: ?40c to +85c; t versions: ?55c to +125c. 2 guaranteed by design; not subject to production test.
adg411/adg412/adg413 rev. d | page 4 of 16 single supply v dd = 12 v 10%, v ss = 0 v, v l = 5 v 10%, gnd = 0 v, unless otherwise noted. 1 table 2. b version t version parameter +25c ?40c to + 85c +25c ?55c to +125c unit test conditions/comments analog signal range 0 v to v dd 0 v to v dd v r on 40 40 typ 0 < v d = 8.5 v, i s = ?10 ma; 80 100 80 100 max v dd = 10.8 v leakage currents v dd = 13.2 v source off leakage i s (off) 0.1 0.1 na typ v d = 12.2 v/1 v, v s = 1 v/12.2 v; 0.25 5 0.25 20 na max figure 15 drain off leakage i d (off) 0.1 0.1 na typ v d = 12.2 v/1 v, v s = 1 v/12.2 v; 0.25 5 0.25 20 na max figure 15 channel on leakage i d , i s (on) 0.1 0.1 na typ v d = v s = 12.2 v/1 v; 0.4 10 0.4 40 na max figure 16 digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.5 0.5 a max dynamic characteristics 2 t on 175 175 ns typ r l = 300 , c l = 35 pf; 250 250 ns max v s = 8 v; figure 17 t off 95 95 ns typ r l = 300 , c l = 35 pf; 125 125 ns max v s = 8 v; figure 17 break-before-make time delay, t d (adg413 only) 25 25 ns typ r l = 300 , c l = 35 pf; v s1 = v s2 = +10 v; figure 18 charge injection 25 25 pc typ v s = 0 v, r s = 0 , c l = 10 nf; figure 19 off isolation 68 68 db typ r l = 50 , c l = 5 pf, f = 1 mhz; figure 20 channel-to-channel crosstalk 85 85 db typ r l = 50 , c l = 5 pf, f = 1 mhz; figure 21 c s (off) 9 9 pf typ f = 1 mhz c d (off) 9 9 pf typ f = 1 mhz c d , c s (on) 35 35 pf typ f = 1 mhz power requirements v dd = 13.2 v; digital inputs = 0 v or 5 v i dd 0.0001 0.0001 a typ 1 5 1 5 a max i l 0.0001 0.0001 a typ 1 5 1 5 a max v l = 5.25 v 1 temperature ranges are as foll ows: b versions:?40c to +85c; t versions: ?55c to +125c. 2 guaranteed by design; not subject to production test. table 3. truth table (adg411/adg412) adg411 in adg412 in switch condition 0 1 on 1 0 off table 4. truth table (adg413) logic switch 1, 4 switch 2, 3 0 off on 1 on off
adg411/adg412/adg413 rev. d | page 5 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 5. parameters ratings v dd to v ss 44 v v dd to gnd ?0.3 v to +25 v v ss to gnd +0.3 v to ?25 v v l to gnd ?0.3 v to v dd + 0.3 v analog, digital inputs 1 v ss ? 2 v to v dd + 2 v or 30 ma, whichever occurs first continuous current, s or d 30 ma peak current, s or d (pulsed at 1 ms, 10% duty cycle max) 100 ma operating temperature range industrial (b version) ?40c to +85c extended (t version) ?55c to +125c storage temperature range ?65c to +150c junction temperature 150c pdip, power dissipation 470 mw ja thermal impedance 117c/w lead temperature, soldering (10 s) 260c soic package, power dissipation 600 mw ja thermal impedance 77c/w tssop package, power dissipation 450 mw ja thermal impedance 115c/w jc thermal impedance 35c/w lead temperature, soldering vapor phase (60 s) 215c infrared (15 s) 220c 1 overvoltages at in, s, or d are clamped by internal diodes. current should be limited to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. esd caution
adg411/adg412/adg413 rev. d | page 6 of 16 pin configuration and fu nction descriptions 00024-004 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in1 d1 s1 v ss gnd s4 d4 in4 in2 d2 s2 v dd v l s3 d3 in3 adg411/ adg412/ adg413 top view (not to scale) figure 4. pin configuration table 6. pin function descriptions pin no. mnemonic description 1, 8, 9, 16 in1Cin4 logic control input. 2, 7, 10, 15 d1Cd4 drain terminal. can be an input or output. 3, 6, 11, 14 s1Cs4 source terminal. can be an input or output. 4 v ss most negative power supply potential in dual supplies. in single supply applications, it may be connected to gnd. 5 gnd ground (0 v) reference. 12 v l logic power supply (5 v). 13 v dd most positive power supply potential.
adg411/adg412/adg413 rev. d | page 7 of 16 typical performance characteristics 50 0 10 20 30 40 ?20 20 v dd = +5v v ss = ?5v v dd = +10v v ss = ?10v v dd = +12v v ss = ?12v t a = 25 c v l = +5v v dd = +15v v ss = ?15v 10 0 ?10 00024-005 v d or v s ? drain or source voltage (v) r on ( ) figure 5. on resistance as a function of v d (v s ) dual supplies 50 0 10 20 30 40 ?20 ?15 ?10 ?5 0 5 10 15 20 85 c 25 c 00024-006 v d or v s ? drain or source voltage (v) r on ( ) v dd = +15v v ss = ?15v v l = +5v 125 c figure 6. on resistance as a function of v d (v s ) for different temperatures 10 1 0.1 0.01 0.001 100 1k 10k 100k 1m 100m 00024-007 frequency (hz) leakage current (na) i d (off) v dd = +15v v ss = ?15v v l = +5v v d = 15v v s = 15v i s (off) i d (on) figure 7. leakage currents as a function of temperature 50 0 10 20 30 40 02 v dd = +10v v ss = 0v t a = 25c v l = +5v v dd = +15v v ss = 0v 15 10 5 00024-008 v d or v s ? drain or source voltage (v) r on ( ) 0 v dd = +5v v ss = 0v v dd = +12v v ss = 0v figure 8. on resistance as a function of v d (v s ) single supply 100m 10m 1m 100 10 1 100n 10 100 1k 10k 100k 1m 10m 00024-009 frequency (hz) i supply (a) i+, i? i l v dd = +15v v ss = ?15v v l = +5v 4 sw 1 sw figure 9. supply current vs. input switching frequency 0.04 ?0.04 ?0.02 0 0.02 ?20 20 10 0 ?10 00024-010 v d or v s ? drain or source voltage (v) leakage current (na) v dd = +15v v ss = ?15v t a = 25c v l = +5v i d (on) i s (off) i d (off) figure 10. leakage currents as a function of v d (v s )
adg411/adg412/adg413 rev. d | page 8 of 16 120 40 60 80 100 100 10m 1m 100k 10k 1k 00024-011 frequency (hz) off isolation (db) v dd = +15v v ss = ?15v v l = +5v figure 11. off isol ation vs. frequency 110 60 70 80 90 100 100 10m 1m 100k 10k 1k 00024-012 frequency (hz) crosstalk (db) v dd = +15v v ss = ?15v v l = +5v figure 12. crosstalk vs. frequency
adg411/adg412/adg413 rev. d | page 9 of 16 terminology r on ohmic resistance between d and s. i s (off) source leakage current with the switch off. i d (off) drain leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v d (v s ) analog voltage on terminals d, s. c s (off) off switch source capacitance. c d (off) off switch drain capacitance. c d , c s (on) on switch capacitance. t on delay between applying the digital control input and the output switching on. t off delay between applying the digital control input and the output switching off. t d off time or on time measured between the 90% points of both switches, when switching from one address state to another. crosstalk a measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off switch. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching.
adg411/adg412/adg413 rev. d | page 10 of 16 applications figure 13 illustrates a precise, fast, sample-and-hold circuit. an ad845 is used as the input buffer while the output operational amplifier is an ad711. during the track mode, sw1 is closed and the output v out follows the input signal v in . in the hold mode, sw1 is opened and the signal is held by the hold capacitor c h . due to switch and capacitor leakage, the voltage on the hold capacitor decreases with time. the adg411/adg412/adg413 minimizes this droop due to its low leakage specifications. the droop rate is further minimized by the use of a polystyrene hold capacitor. the droop rate for the circuit shown is typically 30 v/s. a second switch, sw2, which operates in parallel with sw1, is included in this circuit to reduce pedestal error. since both switches are at the same potential, they have a differential effect on the op amp ad711, which minimizes charge injection effects. pedestal error is also reduced by the compensation network r c and c c . this compensation network also reduces the hold time glitch while optimizing the acquisition time. using the illustrated op amps and component values, the pedestal error has a maximum value of 5 mv over the 10 v input range. both the acquisition and settling times are 850 ns. 00024-013 +15v ?15v 2200pf r c 75 c c 1000pf c h 2200pf v out adg411 adg412 adg413 sw2 sw1 s s d d +15v +5v ?15v ad845 +15v ?15v v in ad711 figure 13. fast, accurate sample-and-hold
adg411/adg412/adg413 rev. d | page 11 of 16 test circuits sd v s r on = v1/i ds i ds v1 00024-014 figure 14. on resistance sd v s v d i s (off) i d (off) a a 00024-015 figure 15. off leakage sd v s v d i d (on) a 00024-016 figure 16. on leakage s +15v +5v 0.1 f 0.1 f v dd v l in v s gnd v ss r l 300 c l 35pf v out 0.1 f ?15v t on t off 3v 50% 50% 50% 50% 3v 90% 90% v in v in v out adg411 adg412 00024-017 d figure 17. switching times s1 d1 +15v +5v 0.1 f 0.1 f v dd v l in1, in2 v s1 gnd v ss r l1 300 c l1 35pf v out1 0.1 f ?15v v s2 v out2 r l2 300 c l2 35pf s2 v in d2 t d t d 3v 50% 50% 90% v in v out1 v out2 90% 90% 90% 0v 0v 0v 00024-018 figure 18. break-before-make time delay +15v +5v v dd v l in v s gnd v ss c l 10nf v out ?15v r s 3v v in v out v out q inj = c l v out 00024-019 sd figure 19. charge injection
adg411/adg412/adg413 rev. d | page 12 of 16 +15v +5v 0.1 f 0.1 f v dd v l in v s gnd v ss r l 50 v out 0.1 f ?15v v in 00024-020 sd figure 20. off isolation s +15v +5v 0.1 f 0.1 f v dd v l v s gnd v ss 50 nc 0.1 f ?15v v in1 v in2 d r l 50 v out channel-to-channel crosstalk = 20 log v s /v out 00024-021 d s figure 21. channel-to-channel crosstalk
adg411/adg412/adg413 rev. d | page 13 of 16 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ac 10.00 (0.3937) 9.80 (0.3858) 16 9 8 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 060606-a 45 figure 22. 16-lead standard small outline package [soic_n] narrow body (r-16) dimensions shown in millimeters and (inches) 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 23. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters
adg411/adg412/adg413 rev. d | page 14 of 16 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. compliant to jedec standards ms-001-ab 073106-b 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 16 1 8 9 0.100 (2.54) bsc 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) 0.210 (5.33) max seating plane 0.015 (0.38) min 0.005 (0.13) min 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) gauge plane 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) figure 24. 16-lead plastic dual in-line package [pdip] (n-16) dimensions shown in inches and (millimeters)
adg411/adg412/adg413 rev. d | page 15 of 16 ordering guide model 1 temperature range package description package option adg411bn ?40c to +85c 16-lead p-dip n-16 adg411bnz ?40c to +85c 16-lead p-dip n-16 adg411br ?40c to +85c 16-lead soic_n r-16 adg411br-reel ?40c to +85c 16-lead soic_n r-16 adg411br-reel7 ?40c to +85c 16-lead soic_n r-16 adg411brz ?40c to +85c 16-lead soic_n r-16 adg411brz-reel ?40c to +85c 16-lead soic_n r-16 adg411brz-reel7 ?40c to +85c 16-lead soic_n r-16 adg411bru ?40c to +85c 16-lead tssop ru-16 adg411bru-reel ?40c to +85c 16-lead tssop ru-16 adg411bru-reel7 ?40c to +85c 16-lead tssop ru-16 adg411bruz ?40c to +85c 16-lead tssop ru-16 adg411bruz-reel ?40c to +85c 16-lead tssop ru-16 adg411bruz-reel7 ?40c to +85c 16-lead tssop ru-16 adg411bchips die adg412bn ?40c to +85c 16-lead p-dip n-16 adg412bnz ?40c to +85c 16-lead p-dip n-16 adg412br ?40c to +85c 16-lead soic_n r-16 adg412br-reel ?40c to +85c 16-lead soic_n r-16 adg412br-reel7 ?40c to +85c 16-lead soic_n r-16 adg412brz ?40c to +85c 16-lead soic_n r-16 adg412brz-reel ?40c to +85c 16-lead soic_n r-16 adg412brz-reel7 ?40c to +85c 16-lead soic_n r-16 adg412bru ?40c to +85c 16-lead tssop ru-16 adg412bru-reel ?40c to +85c 16-lead tssop ru-16 adg412bru-reel7 ?40c to +85c 16-lead tssop ru-16 adg412bruz ?40c to +85c 16-lead tssop ru-16 adg412bruz-reel ?40c to +85c 16-lead tssop ru-16 adg412bruz-reel7 ?40c to +85c 16-lead tssop ru-16 adg413bn ?40c to +85c 16-lead p-dip n-16 adg413bnz ?40c to +85c 16-lead p-dip n-16 adg413br ?40c to +85c 16-lead soic_n r-16 adg413br-reel ?40c to +85c 16-lead soic_n r-16 adg413brz ?40c to +85c 16-lead soic_n r-16 adg413brz-reel ?40c to +85c 16-lead soic_n r-16 adg413bruz ?40c to +85c 16-lead tssop ru-16 ADG413BRUZ-500RL7 ?40c to +85c 16-lead tssop ru-16 adg413bruz-reel ?40c to +85c 16-lead tssop ru-16 adg413bruz-reel7 ?40c to +85c 16-lead tssop ru-16 1 z = rohs compliant part.
adg411/adg412/adg413 rev. d | page 16 of 16 notes ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00024-0-6 /10(d)

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